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Markus Müller

Markus Müller

Research Associate and PhD candidate

TU Dresden

Biography

I am a research associate and PhD candidate at the chair for electron devices at TU Dresden. My interests include compact modeling, TCAD simulation and characterization of transistors, in particular HBTs. I am involved in the development of several software projects.

Interests

  • compact modeling of HBTs
  • TCAD simulation
  • circuit simulation and design
  • software development

Education

  • Dr.-Ing., ongoing

    TU Dresden

  • Dipl.-Ing. in Electrical Engineering, 2018

    TU Dresden

Skills

Python

C++/Fortran

Transistors/Circuits

Experience

 
 
 
 
 

Research Associate

TU Dresden

Jan 2018 – Present Dresden

Responsibilities include:

 
 
 
 
 

Internship

Rohde&Schwarz

Mar 2016 – Jul 2016 Munich
Design of high frequency broadband power amplifiers using LDMOS technology. Acceptance into the ‘Go-for-Talent’ program due to excellent results.
 
 
 
 
 

Dipl.-Ing.

TU Dresden

Mar 2012 – Jun 2018 Dresden

Responsibilities include:

  • Specialization in Microelectronics and circuit design
  • Focus on organic transistor technologies in theses
  • Student help force at the chair for electron devices from 4th semester onward

Publications

1-D Drift-Diffusion Simulation of Two-Valley Semiconductors and Devices

A two-valley formulation of 1-D drift-diffusion transport is presented that takes the coupling between the valleys into account via a …

VerilogAE: An Open Source Verilog-A Compiler for Compact Model Parameter Extraction

This paper introduces a new open-source Verilog-A compiler, VerilogAE, purpose-built to ease compact model parameter extraction. …

Impact of Dynamic Trapping on High Frequency Organic Field-Effect Transistors

This paper originates from work that I have done during my work as a student. I have extended the in-house TCAD simulator with the …

Selected Results of HICUM Parameter Extraction for InP HBTs

In this presentation I discussed the results of HICUM model parameters that I have extracted for a state-of-the-art III-V process and …

Open License Parameter Extraction Tool - Overview and Demo for SiGe HBTs

In this presentation we introduced the first version of our parameter extraction software to the public and gave a live demo.

Solution Shearing

With the prospect of realizing innovative technologies by large‐area fabrication at low cost and high throughput, printing and coating …

Software Projects

VerilogAE

VerilogAe is a new open-source Verilog-A compiler, purpose-built to ease compact model parameter extraction. It has been developed by my student Pascal as a back-end for our parameter extraction toolkit. VerilogAE retrieves all model equations, their dependencies, and relevant model parameters that are defined in a Verilog-A source file.

COOS

COOS is a TCAD simulator targeted at SiGe and III-V HBTs. I am deveoping this simulator in the scope of my PhD thesis, since none of the commercial tools fits my needs.

Ngspice

Ngspice is an open-source spice simulator for electronic circuits. It enjoys high popularity in the open-source community and has a huge number of features that make it attractive for academia and industry.

DMT

DMT (Device-Modeling-Toolkit) is a framework intended to enable device-engineers to extract the parameters of compact models. have one unified infrastructure that can be used for: analyzing and collecting measurement data working with TCAD and circuit simulators.